X86 microarchitecture levels: Difference between revisions
(Created page with "{{DISPLAYTITLE:x86 microarchitecture levels}} These are the '''microarchitecture levels''' designated by Alexander Nicholi for the 16- and 32-bit {{wp|x86}} microarchitecture. It was initially authored as part of the Sirius DOS project as an ABI concept, but is now a concept related to the {{wp|x86-64#Microarchitecture_levels|x86-64 microarchitecture levels}} jointly defined by Intel, AMD, Red Hat and SUSE. ==x86-v1== Original 8086 instruction set...") |
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==x86-v1== | ==x86-v1== | ||
Original 8086 instruction set. Supported by all x86 microprocessors. Does not include x87 floating-point coprocessor instructions or any variety of SIMD (e.g. MMX and SSE). | Original 8086 instruction set. Supported by all x86 microprocessors. Real mode and unreal mode are the only modes supported by code. Does not include x87 floating-point coprocessor instructions or any variety of SIMD (e.g. MMX and SSE). | ||
==x86-v2== | ==x86-v2== | ||
Minimum feature set is that of the 80286. Supports protected mode and x87 floating-point instructions. | Minimum feature set is that of the 80286. Supports protected mode and x87 floating-point instructions, specifically the full original 8087 and instructions added with the 80287. | ||
==x86-v3== | ==x86-v3== | ||
Minimum feature set is that of the i486. Supports all of the 32-bit extensions from the i386, protected mode, and x87 floating-point. Does not include any variety of SIMD (e.g. MMX, SSE, and 3DNow!). | Minimum feature set is that of the i486. Supports all of the 32-bit extensions from the i386, protected mode, and x87 floating-point. x87 support includes instructions added with the 80387 and earlier. Does not include any variety of SIMD (e.g. MMX, SSE, and 3DNow!). | ||
==x86-v4== | ==x86-v4== | ||
Minimum feature set is that of the Pentium, plus <code>CPUID</code> and MMX instructions. Supports protected mode and x87 floating-point instructions. Does not include SSE, 3DNow!, or any further P5/P6-era instructions (such as <code>SYSENTER</code>). | Minimum feature set is that of the Pentium, plus <code>CPUID</code> and MMX instructions. Supports protected mode and x87 floating-point instructions added with 80387 and earlier but not those added with Pentium Pro. Only the MMX instructions added with the original Pentium MMX are included. Does not include SSE, 3DNow!, or any further P5/P6-era instructions (such as <code>SYSENTER</code>). | ||
[[Category:Protocols]] | [[Category:Protocols]] | ||
Latest revision as of 22:28, 14 January 2024
These are the microarchitecture levels designated by Alexander Nicholi for the 16- and 32-bit x86 microarchitecture. It was initially authored as part of the Sirius DOS project as an ABI concept, but is now a concept related to the x86-64 microarchitecture levels jointly defined by Intel, AMD, Red Hat and SUSE.
x86-v1
Original 8086 instruction set. Supported by all x86 microprocessors. Real mode and unreal mode are the only modes supported by code. Does not include x87 floating-point coprocessor instructions or any variety of SIMD (e.g. MMX and SSE).
x86-v2
Minimum feature set is that of the 80286. Supports protected mode and x87 floating-point instructions, specifically the full original 8087 and instructions added with the 80287.
x86-v3
Minimum feature set is that of the i486. Supports all of the 32-bit extensions from the i386, protected mode, and x87 floating-point. x87 support includes instructions added with the 80387 and earlier. Does not include any variety of SIMD (e.g. MMX, SSE, and 3DNow!).
x86-v4
Minimum feature set is that of the Pentium, plus CPUID and MMX instructions. Supports protected mode and x87 floating-point instructions added with 80387 and earlier but not those added with Pentium Pro. Only the MMX instructions added with the original Pentium MMX are included. Does not include SSE, 3DNow!, or any further P5/P6-era instructions (such as SYSENTER).
